Integrated circuits are an important element of electronic devices. However, the operation of an integrated circuit may be affected by a radiation impact. As the dimensions of circuit elements of integrated circuits decrease, data stored in an integrated circuit may be more likely to be corrupted by radiation impacts, often called single event upset (SEU) strikes. Such radiation impacts may change or “upset” data stored in a memory element. The corrupted data may impact the performance of the integrated circuit. In some instances, the corrupted data may render the integrated circuit unusable until the correct data is restored in the memory. While techniques exist to both detect and correct data errors without having to reload the entire memory, such techniques have significant limitations.
Radiation impacts generate minority carriers which may upset the charge concentration in certain regions of the integrated circuit. Conventional techniques to sink minority carries generated during an SEU strike rely on a “buried layer” having a high recombination rate. However, experiments have shown that this layer leads to the opposite result. That is, the SEU rate increases as highly doped buried P+ layer repels minority carriers or charge, such as electrons in p-substrate. Accordingly, conventional methods of addressing the impact of an SEU strike have failed to prevent the undesirable loss of data.